Multi-chip module

ABSTRACT

A package and packaging method that incorporates multiple surface-mounted devices mounted to the package, which in turn can be mounted onto a circuit board. The package generally includes a pair of laminate substrates that together form a chip carrier and input/output (I/O) interface structure for the devices. The devices are mounted to opposite surfaces of a first of the substrates. The second substrate is attached to the first substrate, and has an interior opening therethrough. The first and second substrates are attached to each other such that devices mounted on one surface of the first substrate are disposed within the interior opening of the second laminate substrate. A mold compound can be applied to underfill and encapsulate the devices mounted to the surfaces of the first substrate.

CROSS REFERENCE TO RELATED APPLICATIONS

Not applicable.

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH

Not applicable.

BACKGROUND OF THE INVENTION

(1) Field of the Invention

The present invention generally relates to circuit device packages. Moreparticularly, this invention relates to a multi-chip module (MCM) andmethod adapted to permit both underfilling and overmolding ofsurface-mounted devices on opposite surfaces of a laminate substratewithin the MCM.

(2) Description of the Related Art

A flip chip is generally a surface-mounted (SM) device in the form of amonolithic semiconductor chip, such as an integrated circuit (IC) chip,having bead-like solder terminals formed on one of its surfaces. Theterminals, also referred to as solder bumps, serve to both secure thechip to a circuit board and electrically interconnect the flip chipcircuitry to a conductor pattern formed on the circuit board, which maybe a ceramic substrate, printed circuit board (PCB), printed wiringboard (PWB), flexible circuit, or a silicon substrate.

While typically mounted directly to a substrate, flip chips have beenincorporated into packages, an example of which is ball grid array (BGA)packages. An example of a BGA package 110 is shown in FIG. 1 asincluding an IC semiconductor chip 112 that is wire bonded to asubstrate 114, e.g., a laminate PCB, with wires 116. The wires 116 areelectrically connected through vias (not shown) in the substrate 114 toterminals 118 on the opposite surface of the substrate 114. Similar tothe flip-chip process, the terminals 118 serve as interconnects betweenthe chip 112 and a conductor pattern on a circuit board (not shown) towhich the BGA package 110 will be mounted. FIG. 2 is an example of theuse of a flip chip 122 in a BGA package 120 to form a single-chipmodule. The flip chip 122 is equipped with solder bumps that form solderjoint connections 126 when the chip 122 is flip-chip mounted to aconductor pattern on a substrate 124, e.g., a high-density PCB, whichcan then be mounted to a circuit (mother) board (not shown) withterminals 128 on the lower surface of the substrate 124. In the casewhere the substrate 124 is a PCB, it is desirable to underfill the flipchip 122 with a filled epoxy 130 to ensure the reliability of the solderjoint connections 126. Finally, FIG. 2 shows the interior of the BGApackage 120 comprising a molding compound 132 that overmolds the chip122.

While the packaging technique of FIG. 2 capitalizes on the processingand assembly advantages provided by flip chips and BGA's, furtherimprovements in packaging processes and density are continuously sought.For example, the underfilling process is both cumbersome and expensive,and becomes more difficult as the number of flip chips mounted to asubstrate increases, especially if the chips are to be mounted to bothsurfaces of the substrate.

BRIEF SUMMARY OF THE INVENTION

The present invention provides a package and packaging method thatincorporate multiple surface-mounted devices, such as flip chips,mounted to a chip carrier, which in turn can be mounted onto a circuitboard. The package is configured to provide a cost-effective,high-density multi-chip module that is also configured to facilitateunderfilling and/or overmolding of circuit devices mounted on both sidesof the chip carrier.

The package of this invention generally includes a pair of laminatesubstrates that together form a chip carrier and input/output (I/O)interface structure for a number of chips, e.g., flip chips, wire-bondedchips and/or other surface-mount components. A first of the laminatesubstrates has a first conductor pattern on a first surface thereof anda second conductor pattern on an oppositely-disposed second surfacethereof. The second laminate substrate is attached to the first laminatesubstrate, and has an interior opening therethrough that is surroundedby a frame portion. The frame portion has a first surface facing thefirst laminate substrate and an oppositely-disposed second surface onwhich solder terminals are present. One or more surface-mounted devicesare mounted to each of the first and second surfaces of the firstlaminate substrate. The first and second laminate substrates areattached to each other such that the surface-mounted device mounted tothe second surface of the first laminate substrate is disposed withinthe interior opening of the second laminate substrate.

In view of the above, the present invention provides a process forforming an MCM package in which one or more surface-mounted devices arelocated within a cavity defined by the interior opening in the secondlaminate substrate. The second laminate substrate is preferablyconfigured with lateral openings, preferably located in its firstsurface and therefore between the first and second laminate substrates.Through one of these lateral openings, a molding compound can beinjected into the cavity defined by the interior opening in the secondlaminate substrate, with the result that the device mounted to thesecond surface of the first laminate substrate can be simultaneouslyunderfilled and overmolded. As such, the present invention provides adual-sided MCM package that can be equipped with flip chips on oppositesurfaces of a laminate substrate. Advantages include a relativelylowcost, electrically testable package whose surface-mounted devices canreadily be both underfilled and overmolded to promote the reliability ofthe package.

Other objects and advantages of this invention will be betterappreciated from the following detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1 and 2 represent cross-sectional views of BGA packages inaccordance with the prior art.

FIG. 3 represents a cross-sectional view of a multi-chip BGA packagethat makes use of a pair of substrates attached together to form a chipcarrier and input/output interface structure in accordance with thepresent invention.

FIG. 4 is a plan view of the package of FIG. 3, in which a mold compoundis omitted to reveal flip chips mounted within the package.

FIG. 5 is a plan view of one of the substrates of the package of FIGS. 3and 4.

FIGS. 6 and 7 represent alternative configurations for gating andventing the package of FIG. 3 in accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

A flip-chip package 10 in accordance with this invention is representedin cross-section in FIG. 3. As shown, the package 10 includes a pair oflaminate PCB's 12 and 14 that are secured together to form a unitarychip carrier and input/output (I/O) interface structure for a number offlip chips 16 mounted to both surfaces of one of the PCB's 12. As such,the package 10 can be termed a dual-sided flip-chip MCM BGA package.While flip chips 16 are illustrated in the Figures, various types ofcircuit components could be present in the package 10 in addition to orin place of the flip chips 16, for example, wire-bonded chips and/orother surface-mount components.

The upper PCB 12 (as viewed in FIG. 3) is shown as a multi-layerlaminate substrate, though other types of substrates could foreseeablybe used. The flip chips 16 are mounted to opposite surfaces 18 and 20 ofthe PCB 12, as can be other surface-mounted (SM) components, such thatthe PCB 12 will be referred to as the carrier PCB 12. In accordance withflip-chip mounting techniques, the chips 16 are physically andelectrically connected to conductor patterns on the chip carrier PCB 12with solder joint connections 22 formed by reflowing solder bumps on thechips 16.

The second PCB 14 is depicted as a two-layer laminate substrate, thoughagain other substrate configurations are within the scope of thisinvention. One surface 24 of the PCB 14 faces the carrier PCB 12, whilethe opposite surface 26 is equipped with solder balls 28 attached tobond pads 30, through which I/O signals from the chips 16 can becommunicated with a mother board (not shown) to which the package 10 iseventually mounted. As such, the PCB 14 will be referred to as the I/OPCB 14. The I/O PCB 14 can be attached to the carrier PCB 12 by asuitable method that allows electrical interconnection between the twoPCB's 12 and 14. The PCB's 12 and 14 may be attached at themanufacturing level, or in a subsequent operation with a conductiveadhesive or, as represented in FIG. 3, solder 32. Whatever theattachment method, electrical paths must be provided between the flipchip connections 22 and the solder balls 28, such as through metallizedvias 56 through the I/O PCB 14.

As is apparent from FIGS. 3, 4 and 5, the I/O PCB 14 is fabricated tohave an interior opening 38, with the remainder of the PCB 14 defining aframe 40 that surrounds the opening 38. The opening 38 and frame 40 areillustrated as having rectangular shapes, though other shapes could beemployed. As a result of the manner in which the PCB's 12 and 14 areassembled, the opening 38 in the I/O PCB 14 defines a cavity 42 in whichare contained the flip chips 16 attached to the lower surface 20 of thecarrier PCB 12. As also depicted in FIG. 3, the cavity 42 contains acompound 44 that encapsulate the flip chips 16 attached to the lowersurface 20 of the carrier PCB 12. For this purpose, the package 10 isequipped with a gate 46 and vent 48 through which a suitable polymericmaterial can be injected into the cavity 42 to form the compound 44. Thegate 46 and vent 48 are represented in FIGS. 3 through 5 as being formedby removing material from the surface 24 of the I/O PCB 14, preferablyat two opposing corners of the PCB 14. In FIG. 5, the I/O PCB 14 isshown as having two slots 50 and 52 milled in its surface 24, the widerslot 50 corresponding to the gate 46 and the narrower slot 52corresponding to the vent 48. The slots 50 and 52 extend diagonally fromopposite corners of the opening 38 to the outer peripheral edge of theI/O PCB 14. When the I/O PCB 14 is assembled to the carrier PCB 12, theslots 50 and 52 are located between the PCB's 12 and 14, such that boththe gate 46 and vent 48 are buried at opposite corners of the package10.

To fill the cavity 42 with the mold compound 44, a film-assisted molding(FAME) technique is preferably utilized. As represented in FIG. 6, afilm 58 is applied to the lower surface 26 of the I/O PCB 14 prior toplacement of the solder balls 28. A suitable liquid polymeric material,such as a thermoset epoxy, is then injected with a nozzle 60 through thegate 46 and into the cavity 42, and is thereafter cured to form thecompound 44. As depicted in FIG. 6, the same polymeric material can besimultaneously injected with the nozzle 60 onto the upper surface 18 ofthe carrier PCB 12 to form a mold compound 54 that, as shown in FIG. 3,encapsulates and preferably underfills the chips 16 on the upper surface18 of the PCB 12. As the cavity 42 fills with the polymeric material,the gaseous contents of the cavity 42, e.g., air, escape through thevent 48. Placement of the gate 46 and vent 48 at the package cornerspromotes the ability of the liquid polymeric material to completely fillthe cavity 42 and reduces the occurrence of voids within the compound44. An alternative approach is depicted in FIG. 7, in which the gate 46is replaced with at least one internal gate 64, shown in the form of athrough-hole in the PCB 12. In this embodiment, the polymeric materialis injected with a nozzle 62 onto the upper surface 18 of the carrierPCB 12, and then flows downward into the cavity 42 through the internalgate 64. As before, the gaseous contents of the cavity 42 escape throughthe vent 48 as the cavity 42 fills with the polymeric material.

From the above description, it can be appreciated that a liquid materialcan be injected into the cavity 42 to both underfill and overmold thechips 16 on the lower surface 20 of the carrier PCB 12, and can besimultaneously deposited on the upper surface 18 of the PCB 12 toencapsulate and underfill chips 16 on the upper surface 18. Theresulting package 10 thus has all of its chips 16 (as well as any otherdevices mounted to the carrier PCB 12), mechanically protected fromextraneous damage as well as underfilled to promote the reliability oftheir solder connections 22. Also from the above description, it can beappreciated that the layouts of the PCB's 12 and 14 can be configuredsuch that the package 10 can be molded in strip form, in which multiplepackages 10 can be simultaneously molded in a single operation. In sodoing, the manufacturing efficiency of the package 10 is increased whiledecreasing costs. The result is a cost-effective, high-density packagingtechnique by which various electrical components (flip chips 16, etc.)are mechanically protected within an electrically-testable package 10.These advantages are achieved while eliminating a separate underfillprocess, preferably utilizing instead a single molding operation duringwhich chips 16 on both surfaces 18 and 20 of the carrier PCB 12 aresimultaneously underfilled and overmolded.

While the invention has been described in terms of a preferredembodiment, it is apparent that other forms could be adopted by oneskilled in the art. Accordingly, the scope of the invention is to belimited only by the following claims.

1. A multi-chip module comprising: a first laminate circuit board havinga first conductor pattern on a first surface thereof and a secondconductor pattern on an oppositely-disposed second surface thereof; asecond laminate circuit board attached to the first laminate circuitboard, the second laminate circuit board having an interior openingtherethrough and a frame portion surrounding the interior opening, theframe portion having a first surface facing the first laminate circuitboard and an oppositely-disposed second surface on which solderterminals are present, the solder terminals of the second laminatecircuit board being electrically interconnected with the first andsecond conductor patterns of the first laminate circuit board throughmetallized vias through the frame portion of the second laminate circuitboard; first and second slots in the first surface of the secondlaminate circuit board so as to define first and second lateral openingsbetween the first and second laminate circuit boards, the first andsecond lateral openings interconnecting the interior opening of thesecond laminate circuit board with an outer perimeter of the secondlaminate circuit board; at least a first flip-chip device on the firstsurface of the first laminate circuit board and electrically connectedto the first conductor pattern with solder connections; at least asecond flip-chip device on the second surface of the first laminatecircuit board and electrically connected to the second conductor patternwith solder connections, the first and second laminate circuit boardsbeing attached so that the second flip-chip device is disposed withinthe interior opening of the second laminate circuit board; and a moldingcompound within the interior opening of the second laminate circuitboard and both underfilling and encapsulating the second flip-chipdevice and the solder connections thereof and filling the first andsecond lateral openings between the first and second laminate circuitboards.
 2. (canceled)
 3. (cancelled)
 4. A multi-chip module according toclaim 1, wherein the second laminate circuit board and the interioropening therein have rectangular shapes, the first lateral openinginterconnects a first corner of the interior opening and an adjacentfirst corner of the second laminate circuit board, and the secondlateral opening interconnects a second corner of the interior openingand an adjacent second corner of the second laminate circuit board, thefirst corners of the interior opening and the second laminate circuitboard being diagonally-opposite the second corners of the interioropening and the second laminate circuit board.
 5. A multi-chip moduleaccording to claim 1, further comprising a molding compound thatencapsulates the first flip-chip device.